Struct TagSequence 

pub struct TagSequence;

The attach/detach sequence used for every session: the ARM default, which writes nothing to DBGMCU and on detach clears DHCSR.C_DEBUGEN and DEMCR.

probe-rs’s built-in STM32 sequences (Stm32Armv7 for the L4, Stm32Armv8 for the U3) set DBGMCU_CR’s debug-in-Stop/Standby bits on attach and never clear C_DEBUGEN. The default sequence leaves the tag as a normal boot would, so nothing about its low-power state depends on having been programmed. (Joulescope measurements after each kind of attach found no difference in resting current; see the evaluation document. Note that every base sets C_DEBUGEN on SWD entry regardless.)

Trait Implementations

impl ArmDebugSequence for TagSequence

fn reset_hardware_assert( &self, interface: &mut (dyn DapProbe + 'static), ) -> Result<(), ArmError>

Assert a system-wide reset line nRST. This is based on the ResetHardwareAssert function from the ARM SVD Debug Description.

fn reset_hardware_deassert( &self, probe: &mut dyn ArmDebugInterface, _default_ap: &FullyQualifiedApAddress, ) -> Result<(), ArmError>

De-Assert a system-wide reset line nRST. This is based on the ResetHardwareDeassert function from the ARM SVD Debug Description.

fn debug_port_setup( &self, interface: &mut (dyn DapProbe + 'static), dp: DpAddress, ) -> Result<(), ArmError>

Prepare the target debug port for connection. This is based on the DebugPortSetup function from the ARM SVD Debug Description.

fn debug_port_start( &self, interface: &mut dyn DapAccess, dp: DpAddress, ) -> Result<(), ArmError>

Connect to the target debug port and power it up. This is based on the DebugPortStart function from the ARM SVD Debug Description.

fn debug_core_start( &self, interface: &mut dyn ArmDebugInterface, core_ap: &FullyQualifiedApAddress, core_type: CoreType, debug_base: Option<u64>, cti_base: Option<u64>, ) -> Result<(), ArmError>

Initialize core debug system. This is based on the DebugCoreStart function from the ARM SVD Debug Description.

fn reset_catch_set( &self, core: &mut dyn ArmMemoryInterface, core_type: CoreType, debug_base: Option<u64>, ) -> Result<(), ArmError>

Configure the target to stop code execution after a reset. After this, the core will halt when it comes out of reset. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

fn reset_catch_clear( &self, core: &mut dyn ArmMemoryInterface, core_type: CoreType, debug_base: Option<u64>, ) -> Result<(), ArmError>

Free hardware resources allocated by ResetCatchSet. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

fn trace_start( &self, interface: &mut dyn ArmDebugInterface, components: &[CoresightComponent], _sink: &TraceSink, ) -> Result<(), ArmError>

Enable target trace capture.

fn reset_system( &self, interface: &mut dyn ArmMemoryInterface, core_type: CoreType, debug_base: Option<u64>, ) -> Result<(), ArmError>

Executes a system-wide reset without debug domain (or warm-reset that preserves debug connection) via software mechanisms, for example AIRCR.SYSRESETREQ. This is based on the ResetSystem function from the ARM SVD Debug Description.

fn debug_device_unlock( &self, _interface: &mut dyn ArmDebugInterface, _default_ap: &FullyQualifiedApAddress, _permissions: &Permissions, ) -> Result<(), ArmError>

Check if the device is in a locked state and unlock it. Use query command elements for user confirmation. Executed after having powered up the debug port. This is based on the DebugDeviceUnlock function from the ARM SVD Debug Description.

fn recover_support_start( &self, _interface: &mut dyn ArmMemoryInterface, ) -> Result<(), ArmError>

Executed before step or run command to support recovery from a lost target connection, e.g. after a low power mode. This is based on the RecoverSupportStart function from the ARM SVD Debug Description.

fn debug_core_stop( &self, interface: &mut dyn ArmMemoryInterface, core_type: CoreType, ) -> Result<(), ArmError>

Executed when the debugger session is disconnected from the core.

fn debug_port_stop( &self, interface: &mut (dyn DapProbe + 'static), dp: DpAddress, ) -> Result<(), ArmError>

Sequence executed when disconnecting from a debug port.

fn debug_port_connect( &self, interface: &mut (dyn DapProbe + 'static), dp: DpAddress, ) -> Result<(), ArmError>

Perform a SWD line reset or enter the JTAG Run-Test-Idle state, and then try to connect to a debug port.

fn prepare_running_on_ram( &self, session: &mut Session, vector_table_addr: u64, core_id: usize, ) -> Result<(), Error>

This ARM sequence is called if an image was flashed to RAM directly. It should perform the necessary preparation to run that image on the core with the ID passed to the function.

fn on_attach( &self, _interface: &mut dyn ArmDebugInterface, _ap: &FullyQualifiedApAddress, _core_type: CoreType, ) -> Result<(), ArmError>

Called before attaching to a core.

fn debug_erase_sequence(&self) -> Option<Arc<dyn DebugEraseSequence>>

Return the Debug Erase Sequence implementation if it exists

fn allowed_access_ports(&self) -> Vec<u8>

Return the APs that are expected to work.

impl Debug for TagSequence

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.