Struct FieldSafeArm 

pub struct FieldSafeArm {
    probe: Box<FieldSafeProbe>,
    table: Option<DapTable>,
}

The ARM debug interface over a FieldSafeProbe.

Serves DP/AP register traffic from a DapTable and memory through the base’s 32-bit memory commands (via FieldSafeMemory). Only the default debug port and AP0 exist.

Fields

probe: Box<FieldSafeProbe>

The probe, owned while the interface is in use and handed back by [ArmDebugInterface::close].

table: Option<DapTable>

The DAP answers for the part, chosen on first use from its chip ID.

Implementations

impl FieldSafeArm

fn table(&mut self) -> Result<DapTable, ArmError>

The DAP table for the connected part: L4 or U3 by DBGMCU IDCODE, read with the debug-register command every base supports.

Cached after the first success, so the part is identified once per session.

Errors

[ArmError::Probe] with “chip identification” if neither IDCODE address reads plausibly (no tag, an unpowered tag, or another part).

fn read_words(&mut self, address: u32, data: &mut [u32]) -> Result<(), ArmError>

Reads data.len() words at address with READMEM_32BIT, in chunks of at most CHUNK bytes.

address must be word-aligned, as probe-rs guarantees for 32-bit accesses. The core is not halted for the read.

Errors

[ArmError::Probe] (“memory read”) if any chunk fails, e.g. on a bus fault; data is then left unchanged.

fn write_words(&mut self, address: u32, data: &[u32]) -> Result<(), ArmError>

Writes data at address with WRITEMEM_32BIT, in chunks of at most CHUNK bytes.

address must be word-aligned.

Errors

[ArmError::Probe] (“memory write”) if any chunk fails; earlier chunks have then already been written.

fn read_bytes(&mut self, address: u32, data: &mut [u8]) -> Result<(), ArmError>

Reads data.len() bytes at any alignment with whole-word reads.

Reads the enclosing aligned words and copies out the bytes asked for, so up to 3 bytes either side are also read from the target.

Errors

As read_words.

fn write_bytes(&mut self, address: u32, data: &[u8]) -> Result<(), ArmError>

Writes bytes at any alignment by read-modify-write of whole words.

The bytes either side of data within the edge words are written back with the values just read. That is not atomic: anything the target changes in those bytes between the read and the write is lost, so this is only safe for memory the core is not using (probe-rs uses it for halted-core SRAM and flash-algorithm buffers), never for peripheral registers.

Errors

As read_words and write_words.

Trait Implementations

impl ArmDebugInterface for FieldSafeArm

fn reinitialize(&mut self) -> Result<(), ArmError>

Does nothing: the DAP state is the table’s, and the base keeps the link up itself.

fn access_ports( &mut self, _dp: DpAddress, ) -> Result<BTreeSet<FullyQualifiedApAddress>, ArmError>

Returns AP0 on the default DP, the only access port these parts use.

fn close(self: Box<Self>) -> Probe

Hands the FieldSafeProbe back as an unattached probe-rs [Probe].

The base stays in SWD mode; the probe is only ever dropped afterwards, which detaches it.

fn select_debug_port(&mut self, dp: DpAddress) -> Result<(), ArmError>

Accepts only the default DP; multidrop SWD is not supported.

fn current_debug_port(&self) -> Option<DpAddress>

Always the default DP.

fn memory_interface( &mut self, access_port: &FullyQualifiedApAddress, ) -> Result<Box<dyn ArmMemoryInterface + '_>, ArmError>

Returns a FieldSafeMemory for AP0; any other AP is refused.

impl DapAccess for FieldSafeArm

fn read_raw_dp_register( &mut self, _dp: DpAddress, address: DpRegisterAddress, ) -> Result<u32, ArmError>

Answers DP register reads from the DapTable without touching the wire.

DPIDR gets the part’s value; CTRL/STAT (bank 0) reports debug and system power-up requested and acknowledged, which ends probe-rs’s power-up handshake; everything else reads 0. The bases’ own READ_DAP_REG cannot be used: old firmware returns stale data for it.

fn write_raw_dp_register( &mut self, _dp: DpAddress, _address: DpRegisterAddress, _value: u32, ) -> Result<(), ArmError>

Accepts and ignores DP register writes; the base powers up and selects the DAP itself on SWD entry.

fn read_raw_ap_register( &mut self, ap: &FullyQualifiedApAddress, address: u64, ) -> Result<u32, ArmError>

Answers AP register reads from the DapTable without touching the wire.

AP0 reports its CSW, BASE and IDR; other registers read 0. Any AP other than AP0 reads 0 throughout, which probe-rs takes as “no AP”.

fn write_raw_ap_register( &mut self, _ap: &FullyQualifiedApAddress, _address: u64, _value: u32, ) -> Result<(), ArmError>

Accepts and ignores AP register writes: memory never goes through TAR/DRW, and the base’s memory commands set CSW themselves.

fn try_dap_probe(&self) -> Option<&dyn DapProbe>

Returns None: there is no raw DAP access to offer.

fn try_dap_probe_mut(&mut self) -> Option<&mut dyn DapProbe>

Returns None: there is no raw DAP access to offer.

fn read_raw_ap_register_repeated( &mut self, ap: &FullyQualifiedApAddress, addr: u64, values: &mut [u32], ) -> Result<(), ArmError>

Read multiple values from the same Access Port register.

fn write_raw_ap_register_repeated( &mut self, ap: &FullyQualifiedApAddress, addr: u64, values: &[u32], ) -> Result<(), ArmError>

Write multiple values to the same Access Port register.

fn flush(&mut self) -> Result<(), ArmError>

Flush any outstanding operations.

impl Debug for FieldSafeArm

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl SwdSequence for FieldSafeArm

fn swj_sequence( &mut self, _bit_len: u8, _bits: u64, ) -> Result<(), DebugProbeError>

Refuses raw SWJ bit sequences (line resets, JTAG-to-SWD switches); the base performs those itself on SWD entry.

fn swj_pins( &mut self, pin_out: u32, pin_select: u32, _pin_wait: u32, ) -> Result<u32, DebugProbeError>

Drives nRST when that is the only pin selected; refuses any other pin.

probe-rs’s reset sequences use this to assert and release reset. Returns pin_out as the pin state read back; pin_wait is ignored.

impl SwoAccess for FieldSafeArm

fn enable_swo(&mut self, _config: &SwoConfig) -> Result<(), ArmError>

Refuses: the bases do not capture SWO.

fn disable_swo(&mut self) -> Result<(), ArmError>

Does nothing; SWO is never enabled.

fn read_swo_timeout(&mut self, _timeout: Duration) -> Result<Vec<u8>, ArmError>

Refuses: the bases do not capture SWO.

fn read_swo(&mut self) -> Result<Vec<u8>, ArmError>

Read any available SWO data without waiting.

fn swo_poll_interval_hint(&mut self, config: &SwoConfig) -> Option<Duration>

Request an estimated best time to wait between polls of read_swo.

fn swo_buffer_size(&mut self) -> Option<usize>

Request the probe SWO buffer size, if known.