Crate tag_monitor_test 

tag-monitor-test: tests the monitor interface.

Port of host/commandline/tag-monitor-test.cc. Drives the STM32L4 DebugMonitor handshake directly over LinkAdapt, without tagcore’s TagMonitor, as an independent check of the interface: reset into the monitor, read the version, SHA string and buffer size, send MONITORSTART, print what was read and end the session with MONITORSTOP. It follows the same rules as TagMonitor:

• debug control is programmed before reset is released, because standby can power-cycle the core debug block (writes after that fault, ST-LINK status 0x81);
• DCRDR is both request and response mailbox, so a request is written only when MON_PEND and MON_REQ are clear, and a call waits for MON_REQ to clear before reading the result;
• C_MASKINTS is never left set, since it survives the halt release and stalls the firmware with every interrupt masked.

STM32L4 only: on an STM32U3, whose monitor is the shared block, it says so and exits before writing any debug register. Exits 0 once the handshake completes, 1 otherwise.

Usage: tag-monitor-test [-d] [-b BUS:DEVICE]. On success it prints the monitor version, call-buffer size in bytes and the tag’s SHA string. Option errors exit 2 (clap).

Hardware side effects

The attach resets the tag and writes DHCSR and DEMCR (Cortex-M debug registers) directly; the session ends with MONITORSTOP, after which the firmware clears its own debug state. A part whose DBGMCU ID code reads as neither an L4 nor a U3 is treated as an L4.

Structs

Cli 🔒

tests the monitor interface

TestMonitor 🔒

The C++ TestMonitor: a LinkAdapt with its own monitor call and attach sequence, and the state the attach reads.

Constants

C_DEBUGEN 🔒

DHCSR: halting debug enable.

C_HALT 🔒

DHCSR: halt request.

C_MASKINTS 🔒

DHCSR: mask PendSV, SysTick and external interrupts while stepping or halted.

DBGKEY 🔒

Key that must accompany every DHCSR write, in bits 31:16.

DCRDR 🔒

Debug Core Register Data Register, the monitor’s request and response mailbox.

DEMCR 🔒

Debug Exception and Monitor Control Register.

DHCSR 🔒

Debug Halting Control and Status Register (Armv7-M).

L4_DBGMCU_IDCODE 🔒

DBGMCU_IDCODE address on the STM32L4.

MON_EN 🔒

DEMCR: enable the DebugMonitor exception.

MON_PEND 🔒

DEMCR: pend the DebugMonitor exception.

MON_REQ 🔒

DEMCR: monitor request bit, used as “request outstanding” by the host and cleared by the firmware when the result is in DCRDR.

S_HALT 🔒

DHCSR: the core is halted (read only).

TRCENA 🔒

DEMCR: enable the DWT and ITM trace blocks.

U3_DBGMCU_IDCODE 🔒

DBGMCU_IDCODE address on the STM32U3.

VC_CORERESET 🔒

DEMCR: vector catch on core reset; the firmware reads it as “a host is attached”.

Functions

main 🔒

Attaches through the raw handshake, prints what it read and ends the session with MONITORSTOP.

ms 🔒

Shorthand for a Duration of n milliseconds.

plausible_idcode 🔒

True if idcode has a real device ID (neither all zero nor all one).

select_device 🔒

Finds the ST-LINK the arguments select, or exits: options.cc’s rule, applied to LinkAdapt::available since this tool has no Tag.